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Spectrum Digital, Inc
1.4 Memory Map
The DaVinci family of processors have a large byte addressable address space, some
limitations to byte addressing are determined by peripheral interconnection to the
DM6437 device. Program code and data can be placed anywhere in the unified
address space. Addresses are multiple sizes depending on hardware implementation.
Refer to the appropriate device data sheets for more details.
The memory map shows the address space of a DM6437 processor on the left with
specific details of how each region is used on the right. By default, the internal memory
sits at the beginning of the address space. Portions of memory can be remapped in
software as L2 cache rather than fixed RAM.
The part incorporates a dual EMIF interface. One dedicated EMIF directly interfaces to
the DDR2 memory. The Flash, NAND Flash, or SRAM are mapped into CS2 space and
selectable via JP2. When CS2 is used for daughter card interfacing JP2 must be set
appropriately.
Address
DM6437 EVM
0x10800000
Cache/RAM
0x42000000
CS2
0x44000000
CS3
0x46000000
CS4
0x48000000
CS5
0x4C000000
VLNQ
0x80000000
DDR
Figure 1-3, Memory Map, DM6437 EVM
1-5
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